A High-Throughput Pruning-Based Pair-Hidden-Markov-Model Hardware Accelerator for Next-Generation DNA Sequencing

Abstract

We present the first ASIC accelerator for a pair-hidden-Markov-model (Pair-HMM) in DNA variant calling, which conventionally requires ~250T FLOPs per sequenced human genome. Using a hardware-algorithm co-design, we opportunistically replace floating point (FP) multiplication with 20-b log-domain addition while employing bound checks to maintain (provable) correct results in downstream processing. FP computation is reduced by $43{\times }$ on real human genome data. Implemented in a 40-nm CMOS, the 5.67 mm2 accelerator demonstrates 17.3G cell updates per second (CUPS) throughput, marking a $6.6{\times }$ improvement over our baseline ASIC implementation and $355{\times }$ GCUPS/mm2 improvement over an FPGA implementation [2] .