A high-speed, programmable, CSD coefficient FIR filter

Abstract

A new high-speed, programmable FIR filter is presented, which is a multiplierless filter with CSD encoding coefficients. We propose a new programmable CSD encoding structure to make CSD coefficients programmable. Compared with the conventional FIR structure with Booth multipliers, this coding structure improves the speed of filter and decreases the area. We design a 10-bits, 18-taps video luminance filter with the presented filter structure. The completed filter core occupies 6.8 /spl times/ 6.8 mm of silicon area in 0.6 /spl mu/m 2P2M CMOS technology, and its maximum work frequency is 100 MHz.