A high-speed optical mark reader hardware implementation at low cost using programmable logic

Abstract

In today's fast-paced information-driven society, the need for accurate, timely, and cost-effective data collection is very critical. Optical mark reader (OMR) systems can be used to achieve these aspects. This paper describes the development of a low-cost and high-speed OMR system prototype for marking multiple-choice questions. The novelty of this approach is the implementation of the complete system into a single low-cost Field Programmable Gate Array (FPGA) to achieve the high processing speed. Effective mark detection and verification algorithms have been developed and implemented to achieve real-time performance at low computational cost. The OMR is capable of processing a high-resolution CCD linear sensor with 3456 pixels at 5000 frame/s at the effective maximum clock rate of the sensor of 20 MHz (4×5 MHz). The performance of the prototype system is tested for different marker colours and marking methods. At the end of the paper the proposed OMR system is compared with commercially available systems and the pro and cons are discussed.