Abstract

We have proposed a high-speed, low-power CMOS circuit that controls the substrate voltage of the SOI MOSFET by the output voltage of a CMOS inverter circuit. This circuit operates at a power supply voltage of 1 V or lower with a nearly constant delay for rise times and fall times of the input signal from 10 ps to 500 ps and has a maximum reduction of 60% in the delay time compared to a conventional circuit. We defined the structure to speed up this circuit and illustrated the relationship between the MOSFET device parameters and the circuit characteristics. The power consumption during standby in this circuit can be reduced to 1 nW by adjusting the supply voltage to the MOSFET substrate. © 2001 Scripta Technica, Electron Comm Jpn Pt 2, 84(5): 20–28, 2001

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.