A High Speed DMA Transaction Method for PCI Express Devices

Abstract

PCI Express is being more and more widely deployed for its attractive bandwidth in virtual instrument design. However, very few PCI express transaction methods can be found in literature. So, this paper presents a novel PCI Express DMA transaction method based on bridge chip PEX 8311. Furthermore, we propose a new method to optimize PCI Express DMA Transaction through improving both bus-efficiency and DMA-efficiency. A novel FSM design to respond data and address cycles on PCI Express bus is introduced, and a continuous data burst is realized, which greatly promote bus-efficiency. As the foundation of the whole design, a successful 2.5G PCI Express interface design is presented. Then, to make a whole solution, in software design, WDM driver framework and three successful DMA optimizing options for PCI Express devices are presented to improve DMA-efficiency. At last, a FSM-based test to data transaction speed is proposed. Experiments show that method discussed here can reach a maximum DMA WRITE speed up to 166 MBytes/s and DMA READ speed up to 136 MBytes/s. Both of them exceed PCI theoretical maximum speed (133MBytes/s). In fact, this paper provides not noly a PCI Express example, but also PCI Express interface solution and DMA transaction method which can be directly extended into high speed PXI-Express applications and so forth. That is quite meaningful to next generation instrumentation.