A high resolution sigma-delta modulator with extended dynamic range

Abstract

The authors introduce a third-order cascaded sigma-delta modulator that uses a modified cascaded architecture and reduced gain in the first integrator to increase the dynamic range. An experimental modulator fabricated in a 1-/spl mu/m CMOS technology attains 17-bit performance for a 25-kHz signal bandwidth using a single 5-V supply. With an oversampling ratio of 128 and a clock frequency of 6.4 MHz, the modulator achieves a 104-dB dynamic range and a peak signal-to-noise plus distortion ratio (SNDR) of 98 dB.