A High-Q In-Silicon Power Inductor Designed for Wafer-Level Integration of Compact DC–DC Converters

Abstract

This paper reports the design, fabrication, and characterization of a novel power inductor embedded inside a silicon substrate and fabricated at wafer level. Such power inductors in silicon (PIiS) employ high-aspect ratio silicon molds formed with deep-reactive ion etching to obtain large cross-sectional electroplated copper windings (as thick as the silicon wafers). The PIiS also utilize high-resistivity magnetic composites as the core material, in a closed flux path manner, for small core losses and low electromagnetic interference. By using copper electroplating for all of the conductors in the component, the contact resistances between the conductive layers can be minimized and the inductors' quality factor can be improved significantly. Toward the end of the fabrication process, surface bonding pads are also formed on the PIiS, leading to a compact converter packaging with IC circuitry. A square-shaped spiral inductor (of size 3 × 3 × 0.83 mm 3 ) was successfully fabricated. Large inductance (430 nH), low dc resistance (84 mΩ), and high quality factor (21) were achieved at 6 MHz. The fabricated inductor was assembled with a TI TPS62621 buck converter IC, and it achieved a maximum power conversion efficiency of 83%.