Abstract
In this paper, a high precision, high linearity 10 bit Digital-to-Time Converter (DTC) circuit was designed and implemented using a conventional open loop amplifier comparator and voltage reference source. The proposed Digital-to-Time Converter circuit (DTC) uses a large capacitor as the load to implement the fixed-slope method and controls the capacitor array with a segmented coding method to improve the nonlinearity of the DTC. The DTC mentioned has been implemented in standard 130nm CMOS. The DTC designed in this paper has high precision and linearity. The accuracy of the DTC designed in this paper is 315fs. The integral nonlinearity is below 0.52LSB, and the power consumption is 26.4μW.
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