Abstract
In order to increase transfer rate and enhance performance in mass data transmission and storage in real time system, a high performance Serial Advanced Technology Attachment generation 2(SATA II) host controller is proposed in this paper. This paper presents how to improve the hardware performance in course of implementation and validation. The controller was designed using VHDL and developed in the Xilinx Integrated Software Environment (ISE) Version 9.1i. Link layer and transport layer of the host controller architecture are realized in Xilinx Virtex-4 FPGA. SATA protocol is realized based on Multi-Gigabit Transceiver (MGT). Chipscope is applied to fully test and verify the design. Comparing with the routine design method, the new project has better features in the expansibility, scalability, improvability and in-system programmability. The experiment results show that the controller works accurately and stably at 3 Gb/s transfer rate. The controller is well suited for high speed data transfers.
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