Abstract

This article introduces a novel CMOS threshold voltage reference with low temperature coefficient (TC) and high power supply rejection ratio (PSRR). A novel structure consisting of the Beta-multiplier and an operational amplifier is used to reduce the influence of power supply ripple on output reference voltage VREF and improve PSRR. A 1.2-V MOS transistor and a 3.3-V MOS transistor are employed to achieve temperature compensation and low TC for the output reference voltage VREF, through the difference in threshold voltage. The proposed voltage reference was designed and simulated using a 90 nm CMOS process, occupying a compact active area of 0.003 mm2. Post-simulation results confirm that the voltage reference output is 494 mV, exhibiting a mean TC of 12.58 ppm/∘C across a temperature range from −40∘C to 125∘C. It consumes a mere 461.4 nA when supplied with 1.2 V at 27∘C. Over a supply voltage range of 0.8 – 1.32 V, the line sensitivity (LS) measures 0.57 mV/V. Remarkably, it achieves a high PSRR exceeding −85.6 dB at 100 Hz.

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