A High-Linearity Adaptive-Bias SiGe Power Amplifier for 5G Communication

Abstract

This brief presents an adaptive-bias power amplifier (PA) in 0.13 μm SiGe BiCMOS for fifth-generation (5G) communication. An improved adaptive bias circuitry with small area and power overhead is exploited to fulfill the stringent linearity requirement while maintaining high back-off efficiency. The parasitic effects of peripheral interconnections for large-scale transistors are investigated, and a symmetrical layout with bilateral bypass capacitors is adopted to suppress the imbalance. The proposed PA covers the N257 and N258 bands with over 30-dB gain from 22.5 to 32.5 GHz. The measured output-referred 1-dB compression point (OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> ) is 20.1 dBm at 24 GHz and keeps higher than 18.5 dBm up to 31 GHz. The power-added efficiency at 6 dB back-off from OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> is as high as 11.5% at 24 GHz, benefited from the adaptive-bias scheme. Measured with 64-QAM signals, the PA demonstrates the EVM approximate to -25.8 dB with average output power higher than 13 dBm at 24, 26, 28, and 30 GHz.