A High-Frequency Power Factor Correction Stage With Low Output Voltage

Abstract

Single-phase power factor correction (PFC) stages would ideally have three features—operation over the entire line cycle, soft switching at high frequency for all powers and voltages, and a reasonably low output voltage. These features permit high power factor, high combination of density and efficiency, and reduced stress on subsequent stages. Most PFC stages, including the most commonly used, achieve only a subset of these features. Here, we present control innovations to allow a PFC stage to operate from universal input (90–265 Vac) over the entire line cycle with zero-voltage switching (ZVS) with a reduced output voltage. These features are verified with a prototype with very high power factor (> 0.99), high efficiency (98%), and high density (80 W/in3). The PFC can provide an output of 200 Vdc from the entire universal input voltage range which greatly reduces the conversion stress required from subsequent stages. The proposed PFC control consists of a blended feedforward/feedback method that provides additional advantages like guaranteed soft switching, the ability to correct for input capacitance, and the ability to interface with a high-ripple output bus. Therefore, the proposed PFC provides advantages in efficiency and density both for the PFC stage and the overall system.