A High Figure of Merit Low Power LC VCO for D Band Applications

Abstract

This paper presents a power-efficient LC VCO model for D band wireless applications in 90 nm CMOS technology. An area efficient design of the proposed model is ensured by avoiding the requirement of additional capacitor for LC tank and varactor utilizing the parasitic capacitance of MOSs. The performance of the model is evaluated and its compatibility is analyzed using the process comer analysis, temperature swept analysis, Monte Carlo analysis and stability analysis in multifarious environments. An oscillation frequency from 163.25 GHz to 172.77 GHz is obtained with the applied tuning voltage ranged from 0.5 V to 1.1 V. Consuming a low DC power (2.82 – 2.96) mW, the proposed VCO provides relatively high output power on its differential terminal having the value of 15.53 dBm to 6.43 dBm. The phase noise varies from –92.99 dBc/Hz to –75.81 dBc/Hz and the figure of merit has a value of –188.67 dBc/Hz at 164.39 GHz. Finally, comparing with the state-of-art VCO models, the presented model has demonstrated a better performance in terms of low DC power consumption, high output power and a better figure of merit.