Abstract

A high current efficiency two-stage amplifier with inner feedforward path compensation (IFPC) technique is proposed in this paper. To improve the current utilization of the whole structure, the recycling folded cascode amplifier (RFC) is adopted as the first stage, and the inner feedforward path which is used to eliminate the non-dominant pole is composed of the input stage of RFC and the tail current transistor of the second stage amplifier. By using the IFPC technique, the proposed amplifier achieves an extended gain-bandwidth (GBW) and sufficient phase margin (PM) compared to that of the two-stage amplifier using single Miller compensation (SMC). Moreover, this compensation technique avoids extra power consumption since it does not require additional circuits. The proposed two-stage IFPC amplifier was fabricated in a $0.18~\mu \text{m}$ CMOS technology and the chip area of it is about $0.076mm^{2}$ . The simulated open loop AC response shows the DC gain, GBW, and PM are 130dB, 2.01MHz, and 58.3°, respectively. Measured results of transient response show when driving a 120pF load capacitance, the proposed amplifier achieves 368ns average 1% settling time, and about 1.56V/ $\mu \text{s}$ average slew rate (SR). Note that under the condition of 1.8V power supply, the power consumption is only $108\mu W$ , proving the proposed two-stage IFPC amplifier can achieve high current efficiency while maintaining stability.

Highlights

  • The widespread application of portable electronic equipment makes low power consumption become an inevitable development trend of amplifiers

  • To achieve high current efficiency while ensuring high GBW and sufficient phase margin, this paper proposes a performance-enhanced structure called two-stage inner feedforward path compensation (IFPC) amplifier

  • This paper presents a structure based on the two-stage single Miller compensation (SMC) amplifier, which employs the inner feedforward path compensation technique

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Summary

INTRODUCTION

The widespread application of portable electronic equipment makes low power consumption become an inevitable development trend of amplifiers. The scheme called single Miller compensation with a nulling resistor (SMCNR) which can reduce the current flowing through feedforward path by connecting a nulling resistor in series with the miller capacitance was proposed in [12] This method can place RHP zero at high frequency, the lager resistance takes up excessive extra area. The GBW of the amplifier using the above two methods obtain a significant improvement compared with that of the traditional two-stage SMC amplifier These two methods mentioned above require extra power consumption since both of them achieved by increasing additional gain stage. To achieve high current efficiency while ensuring high GBW and sufficient phase margin, this paper proposes a performance-enhanced structure called two-stage inner feedforward path compensation (IFPC) amplifier. What’s more, the analysis of SR is given at the end of this section

TRADITIONAL SIMPLE MILLER COMPENSATION
CIRCUIT IMPLEMENTATION OF THE PROPOSED AMPLIFIER
TOPOLOGY OF THE PROPOSED AMPLIFIER
SLEW RATE OF THE PROPOSED AMPLIFIER
RESULTS AND PERFORMANCE
CONCLUSION
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