Abstract
Digital filter is an important fundamental component in digital signal processing (DSP) systems. Among the digital filters, the finite impulse response (FIR) filter is one of the most commonly used schemes. As a low-complexity hardware implementation technique, stochastic computing has been applied to overcome the huge hardware cost problem of high-order FIR filters. However, the stochastic FIR filter (SFIR) scheme suffers from long processing latency and accuracy degradation. In this paper, the bit stream representation noise is theoretically analyzed, and an adaptive scaling algorithm (ASA) is proposed to improve the accuracy of SFIR with the same bit stream length. Furthermore, a novel antithetic variables method is proposed to further improve the accuracy. According to the simulation results on a 64-tap FIR filter, the ASA and AV methods gain 17 dB and 6 dB on the signal-to-noise ratio (SNR), respectively. The hardware implementation results are also presented in this paper, which illustrates that the proposed ASA-AV-SFIR filter increases 4.6 times hardware efficiency with respect to the existing SFIR schemes.
Highlights
Digital filter is an important fundamental component in digital signal processing (DSP) systems such as image processing [1], speech signal processing, and communication systems [2]
The adaptive scaling algorithm (ASA)-antithetic variables method (AV)-based stochastic FIR filter (SFIR) filter gained 6 dB on signal-to-noise ratio (SNR) performance compared with the ASA-based scheme
The SNR performance of SFIR filter with bit stream length N = 256 under different taps are illustrated as Figure 11b, which indicates that the proposed ASA method and AV method both contribute stable accuracy gains with increasing filter taps
Summary
Digital filter is an important fundamental component in digital signal processing (DSP) systems such as image processing [1], speech signal processing, and communication systems [2]. Reference [6] proposes a bipolar mapping scheme and presents a complete stochastic FIR filter architecture, where the XNOR gate can implement the multiplication. The SFIR filter shows advantages in the extremely low hardware cost While it still suffers from the long processing latency and accuracy degradation due to the relatively long stochastic bit streams [4]. To improve the calculation accuracy of SFIR filters, Reference [2] proposed a two-line mapping scheme, where the sign and magnitude are represented with two bit streams, respectively, and demonstrates obvious accuracy gains. A high-accuracy stochastic FIR filter with adaptive scaling algorithm and antithetic variable method is proposed. The hardware architecture of the proposed ASA–SFIR and ASA–AV–SFIR is designed and implemented, which demonstrates high-accuracy performance advantages with respect to the existing SFIR filters. The last section concludes the performed work and discusses the potential future work
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
