A hierarchical run-time adaptive resource allocation framework for large-scale MPSoC systems

Wei Quan,Andy D Pimentel

doi:10.1007/s10617-016-9179-z

Abstract

In the embedded computer system domain, MPSoC systems have become increasingly popular due to the ever-increasing performance demands of modern embedded applications. The number of processing elements in these MPSoCs also steadily increases. Whereas current MPSoCs still contain a limited number of processing elements, future MPSoCs will feature tens up to hundreds of (heterogeneous) processing elements that are all integrated on a single chip. On these future large-scale MPSoC systems, the mapping of applications onto the hardware resources plays an important role to fully explore the parallelism of applications. In this article, a hierarchical run-time adaptive resource allocation framework which uses an intelligent task remapping approach is proposed to improve the system performance for large-scale MPSoCs.

Highlights

The ever-increasing performance requirements of embedded applications stimulate the development of MPSoC systems in the embedded systems domain
Whereas current MPSoCs still contain a limited number of processing elements, future MPSoCs will feature tens up to hundreds of processing elements that are all integrated on a single chip to handle the generation of embedded applications like real-time physics, artificial intelligence, 3D rendering effects and so on [14]
We proposed a scenario-based hierarchical run-time adaptive resource allocation framework to increase the adaptivity of large-scale heterogeneous MPSoC systems where a large number of scenarios or applications need to be supported

Summary

Introduction

The ever-increasing performance requirements of embedded applications stimulate the development of MPSoC systems in the embedded systems domain. These MPSoC systems, such as most of current smart-phones, digital televisions, set-tops, etc., are often heterogeneous systems containing programmable processor cores for flexible application support as well as dedicated processing elements for achieving power and performance goals. The number of processing elements in these MPSoCs steadily increases because of the never-ending B Wei Quan. Whereas current MPSoCs still contain a limited number of processing elements, future MPSoCs will feature tens up to hundreds of (heterogeneous) processing elements that are all integrated on a single chip to handle the generation of embedded applications like real-time physics, artificial intelligence, 3D rendering effects and so on [14]

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