A hierarchical, design-for-testability (DFT) methodology for the rapid prototyping of application-specific signal processors (RASSP)

R Sedmak,J Evans

doi:10.1109/test.1995.529856

A hierarchical, design-for-testability (DFT) methodology for the rapid prototyping of application-specific signal processors (RASSP)

R Sedmak, J Evans

https://doi.org/10.1109/test.1995.529856

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Publication Date: Oct 21, 1995

Citations: 3

Affiliation: Lockheed Martin (United States)

#Rapid Prototyping Of Application-specific Signal Processors #Improvement In Cycle Time + Show 8 more

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Abstract

This paper describes a highly automated hierarchical, design-for-testability process that spans the entire life cycle. Lockheed Martin's Advanced Technology Laboratories and Self-Test Services developed this process for the DoD's RASSP program, and it contributes significantly to the RASSP goals of 4/spl times/ improvement in cycle time, design quality, and life-cycle costs.

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