A Hardware Implementation of the Levinson Routine in a Radio Detector of Cosmic Rays to Improve a Suppression of the Nonstationary RFI

Abstract

The radio detector system for ultrahigh-energy cosmic rays in the Pierre Auger Observatory operates in the frequency range 30–80 MHz, which is often contaminated by human-made radio-frequency interferences (RFIs). Several filters were used to suppress the RFI: based on the FFT, an IIR notch filter, and an FIR filter based on the linear prediction. The last refreshes the FIR coefficients calculating either in the external ARM processor, internal soft-core NIOS processor implemented inside the field programmable gate aray (FPGA), or hard-core embedded processors [based on Integrated ARM Cortex-A9800 MHz Hardcore Processor System (HPS)] being a silicon part of the FPGA chip. Refreshment times significantly depend on the type of calculation process. For a stationary RFI, the FIR coefficients can be refreshed each minute or rarer. However, an efficient suppression of nonstationary short-term contaminations requires a much faster response. Calculations of FIR coefficients in an external Voipac PXA270M ARM processor take 1–2 s, by the soft-core virtual NIOS processor on the level of hundreds of milliseconds. The HPS allows a reduction of the refreshment time to ~20 ms (for a 32-stage FIR filter). A symmetry of covariance matrix allows one to use the much faster Levinson procedure instead of typical Gauss routine for solving a set of linear equations of time. A hardware implementation of this procedure inside the FPGA fabric as a specialized $\mu \text{C}$ (with 100-MHz clock) requires only ~53 800 clock cycles. We used 64- or 48-b floating-point representations to calculate FIR coefficients. Resources occupation is relatively high, as the design was optimized for a maximal register performance. However, the RFI suppression is very efficient. We expect a significant suppression of even a short-term nonstationary RFI.