A hardware implementation of fuzzy controllers using analog-digital VLSI techniques

Abstract

A new architecture is presented for the implementation of fuzzy systems using analog-digital techniques. This architecture is directed towards allowing the implementation of many rules on the same chip, including the fuzzy inference engine and the defuzzier. This approach is based on a total or partial sequential operation of both the fuzzifier and the defuzzifier. A basic operational cell for a membership function circuit (MFC) as well as its programmable version are described and used for realizing the proposed architecture in a CMOS technology. Using a similar structure to that of the MFCs basic cell, new implementations for MIN-MAX operators are also presented.