A Hardware-Efficient Perturbation Method to the Digital Tent Map

Abstract

Digital chaotic systems used in various applications such as signal processing, artificial intelligence, and communications often suffer from the issue of dynamical degradation. This paper proposes a solution to address this problem in the digital tent map. Our proposed method includes a simple and optimized hardware architecture, along with a hardware-efficient perturbation method, to create a high-performance computing system that retains its chaotic properties. We implemented our proposed architecture using an FPGA (Field-Programmable Gate Array) and the 1’s complement fixed-point format. Our results demonstrate that the implemented digital circuit reduces logical resource consumption compared to state-of-the-art references and exhibits pseudo-random nature, as confirmed by various statistical tests. We validated our proposed pseudo-random number generator in a hardware architecture for particle swarm optimization, demonstrating its effectiveness.