A hardware demonstrator for TD-CDMA

Abstract

TD-CDMA is an air interface concept for third-generation mobile radio systems. It utilizes a combination of the three elementary multiple-access schemes: frequency-division multiple access (FDMA), time-division multiple access (TDMA) and code-division multiple access (CDMA). Multiple-access interference (MAI) and intersymbol interference (ISI) are combated by joint detection of all simultaneous signals of the same cell, achieving a high spectrum efficiency. The authors have been involved in the implementation of a first experimental hardware setup of a TD-CDMA mobile radio system. Important objectives of this project are the demonstration of the economic feasibility of CDMA receivers utilizing joint detection and the performance verification of TD-CDMA by measurement campaigns. The authors present a new way of modeling the TD-CDMA receiver in the form of a data-flow model. This model serves as a starting point for the systematic design of an efficient software architecture for TD-CDMA based on a multiprocessor system. The complete digital signal processing (DSP) of a mobile terminal or of a base station can be implemented on a single Texas Instruments digital signal processor TMS320C80. Measurement results obtained by first field trials are presented. The system parameters of the TD-CDMA demonstrator described are similar but not equal to those chosen for the time-division duplex (TDD) mode of the UMTS terrestrial air interface according to the ETSI decision taken in January 1998.