Abstract
The transmission of data from detectors in future high energy experiments will be driven by a number of requirements. In many cases, raw bandwidth is the strongest of these but other needs such as diverse functionality, compactness, low power and radiation resistance are equally important. The GigaBit-Transceiver project has been launched to provide a solution to these problems. The aim is to deliver a chip-set to build a bidirectional optical link transmitting and receiving serial data at 4.8 Gigabit/s. The project is based on three integrated circuits; a trans-impedance amplifier to receive signals from a photo-diode, a laser driver, and a transceiver containing a high-speed serialiser and de-serialiser. All of these have been successfully prototyped, and this paper will focus on the design and results from the serialiser/deserialiser prototype. This has been designed in commercial 130 nm CMOS with particular emphasis on enhancing its immunity to single-event-effects. The specific design features to achieve this will be described. The chip has been fully characterized in the lab, and jitter and bit-error-rate measurements are presented. The custom packaging of the chip will also be described together with the next steps foreseen in the project.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
