A GHz waveform recorder and digitizer ASIC

Abstract

Waveform of the pulse from detectors carry the maximum possible information, and the high demands of fast waveform digitizing led to the development of switched capacitor arrays (SCAs). A prototype of two channels transient waveform digitization ASIC has been designed and fabricated in global foundry 0.18 urn CMOS process. Each channel employs a SCA structure of 128 samples deep, and the high speed sample clock is provided by an on-chip delay-locked loop (DLL). After waveform capture, the analog signal is fed into 128 parallel 12-bit ramp-comparator analog to digital convertors (ADCs), then followed by a serialized readout module with 200 MHz rate. Based on the simulate results, input analog bandwidth is more than 300 MHz and sampling speed can be adjusted from 0.5 to 2 GSa/s, and after amplitude and time calibration, a full 1 V signal voltage range is available, and the Signal-to-Noise Ratio (SNR) reaches 56 dB at 200 MHz input. Data of each channel can be read out in under 10 μs, respectively.