Abstract

A Genetic Algorithm based optimization technique for the design of combinational logic circuits using Universal logic Modules, 2-1 multiplexer or 2-1 Reed Muller block is proposed. In contrast to applying same select signals for all the units in a level of tree network in conventional methods, the proposed method allows any variable to be used as select signal to any unit in any level. In addition to the use of variables as select signals, the proposed method uses functions derived from previous level as select signal which is not the case in conventional methods. With this technique, complexity of the circuits is made lesser which leads to lesser power consumption, area and delay as compared to the current and conventional methods available in the literature. Standard Boolean functions are implemented to design circuits up to six variables and the results are validated with benchmark functions.

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