A fundamental performance limit of optimized 3.3-V sub-quarter-micrometer fully overlapped LDD MOSFET's

Abstract

The direct experimental quantification of the relationship between gate-to-drain capacitance (C/sub gd/) and hot-electron reliability (HER) for fully overlapped LDD (FOLD) n-channel MOSFETs (NFETs) is reported. To broaden the applicability and achieve a wide range of FOLD finger lengths, the results are based on devices built using each of three different fabrication techniques. The experimentally observed tradeoff is compared to theoretical calculations to investigate its general and fundamental nature. It is shown that a peak in performance occurs at L/sub eff/ approximately=0.20 mu m for reliable 3.3-V NFETs with T/sub ox/=10 nm. Below 0.20 mu m, performance decreases due to the addition of the large FOLD fingers required to maintain adequate HER. This peak in performance can be shifted to L/sub eff/ approximately=0.15 mu m by introducing FOLD fingers only at the drain end of NFETs. For channel lengths greater than 0.25 mu m, the performances of 3.3-V FOLD NFETs and scaled 2.5-V single-diffusion NFETs are nearly equal. However, 2.5-V single-diffusion NFETs begin to offer a significant performance advantage over 3.3-V FOLD NFETs as channel lengths are reduced below 0.25 mu m. >