Abstract
This paper presents a fully integrated transmitter with embedded on-chip antennas to demonstrate on-wafer wireless testing. First, on-chip antenna characterization methods based on the measured transmission link gain are described. From the measured transmission link gain, the on-chip antenna gain is determined using the known transmitter gain, a path loss, and an off-chip antenna gain. The proposed two-step method utilizes a high-gain off-chip antenna transmission link for base line calibration data to obtain better gain accuracy. For wireless testing, a fully integrated a 1.2-GHz Hartley image-reject transmitter is implemented in an 40-GHz f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> InGaP/GaAs HBT process. The image rejection (IR) ratio is measured to demonstrate process control monitoring of device mismatches. Both dipole and loop antennas are integrated to study their radiation efficiency as their dimensions are much less than the wavelength. The loop antenna provides about 7 dB better transmission gain. The IR ratio is measured wirelessly from a number of samples to monitor the die-to-die variations in the in-phase/quadrature mismatch. Monte Carlo simulations are used to aid the analysis of the sources of amplitude and phase mismatches.
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