A Fully Integrated S-Band Phase-Array Receiver in 0.13 μm CMOS SOI

Abstract

In traditional phased-array T/R modules, front-end modules such as limiter, low-noise amplifier (LNA) and RF switch are generally implemented by independent devices, with low integration and high cost. This paper realizes the integration of all receiver functional modules in the 0.13[Formula: see text][Formula: see text]m CMOS SOI process, including RF switch, LNA with limiter, 6-bit digital controlled attenuator and phase shifter, and drive amplifier. The LNA integrates a limiting function, which can suffer 2[Formula: see text]W continuous wave. Fast charge–discharge circuit is applied to the low insertion loss RF switch, which greatly reduces the switching time. The phase shifter adopts a double balanced switch used for 180∘ phase shift, which significantly reduces the phase error. The measured channel gain is about 28[Formula: see text]dB with an NF about 2.3[Formula: see text]dB and an IP1 dB above [Formula: see text]14[Formula: see text]dBm. The state error of attenuator is less than [Formula: see text][Formula: see text]dB with step error less than [Formula: see text][Formula: see text]dB. The RMS phase error of phase shifter is less than 1.8 degrees. The fully integrated transceiver IC occupies an area of [Formula: see text][Formula: see text]mm2. This receiver draws only 128[Formula: see text]mA with a 3.3[Formula: see text]V power supply.