A Fully Integrated Low-Power Hall-Based Isolation Amplifier With IMR Greater Than 120 dB

Abstract

A CMOS Hall-based fully integrated isolation amplifier for differential voltage sensing is presented in this work. The design is fabricated in a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$0.35 \mu \text{m}$ </tex-math></inline-formula> CMOS process in which the high voltage (HV) side of the amplifier contains a coil driver while the low voltage (LV) side includes a Hall-effect sensor, low-noise amplifier, programmable-gain amplifier, filter, and chopper switches. Another Hall sensor performs the digital isolation using the on-off keying (OOK) technique for clock recovery. The introduced prototype achieves above 120 dB of isolation mode rejection (IMR) at 60 Hz and operates at a continuous isolation working voltage of 0.6 kV. It has also a maximum nonlinearity of 0.64 %, an input-referred offset of 1 mV, a 40 dB full-scale signal-to-noise ratio over a 40 kHz bandwidth, and a spurious-free dynamic range of 64 dB. The silicon area for each of the two separate dices employed for the HV and LV side of the isolation amplifier is 1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with a power consumption of 7.6 mW and 9.9 mW respectively. The achieved miniaturized size of the isolation components, as well as their significantly low-power consumption, ensure the suitability of the proposed isolation amplifier for multi-channel readout circuit applications.