A Full Digital Fractional-<inline-formula> <tex-math notation="LaTeX">$N$ </tex-math> </inline-formula> TAF-FLL for Digital Applications: Demonstration of the Principle of a Frequency-Locked Loop Built on Time-Average-Frequency

Abstract

Time-average-frequency (TAF) is a novel concept proposed in 2008 for constructing clock signal. TAF direct period synthesis (TAF-DPS) is an emerging frequency synthesis technique based on TAF. Its distinguished features are small frequency granularity and fast frequency switching, achieved simultaneously for a given design. Furthermore, its output frequency is monotonically changed with a digital control word. Those features make it suitable digitally controlled oscillator (DCO). In this paper, a TAF-DPS DCO is created entirely from digital cells. Using it as the core, a 100% digital TAF frequency-locked loop (TAF-FLL) is constructed. Unlike all established FLL and PLL architectures, TAF-FLL’s output is in TAF instead of conventional frequency. This fact impacts the design from at least two directions. First, it blurs the boundary between integer- and fractional-N. Second, the issues of output jitter and the loop design are independent of each other and can be treated separately. This novel all-digital architecture has been implemented in field-programmable gate array for verifying the principle. It is the first case of building frequency control loop on TAF. The purpose of this TAF-FLL is to drive digital circuits, for digital-oriented applications.