A frequency steered phase locked loop

Abstract

Voltage controlled oscillators (VCOs) implemented in digital VLSI IC (integrated circuit) technology typically have very poorly controlled centre frequencies and poor phase noise characteristics, thus severely limiting their use in phase locked loop (PLL) applications. The new technique presented incorporates an accurate local reference frequency into the PLL structure. The key parameters of the new PLL structure are identified and the performance characterised. It is shown that the range of frequencies to which the new PLL structure can lock can be confined to a small region around the accurate local reference frequency. It is also shown that the new PLL structure provides other benefits such as a reduction of the VCO phase noise, allowing poor quality VCOs to be used in demanding applications. The new technique does not require any monitoring nor any switching of the local frequency reference signal which is always acting.