Abstract

Co-development of hardware and software is a methodology dealing with the increased design complexity of embedded systems. Retargetable code generation is a co-designing method to map a high-level software description onto a variety of hardware architectures without the need to rewrite a compiler. Highly efficient code generation is required to meet, for example, timing, area and low-power constraints. The traditional ordering of code generation phases introduces inefficiencies in the code generation process; phase-coupling deals with these inefficiencies. We introduce a new code generation technique based on simulated annealing. This technique focuses especially on highly irregular DSP architectures and is part of a generic framework for retargetable code generation. This approach is new because it fully tackles the phase-coupling problem. Furthermore, this approach shows that the modeling of the software algorithm and the hardware architecture plays a key role in the efficiency of code generation.

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