A FPGA-based state space controller

Abstract

For many years digital controllers have been implemented using microprocessors, microcontrollers, digital signal processors etc. Recently, field programmable gate arrays (FPGA) is found to be an alternative because of its high processing speed. In this context, this paper presents the implementation of state space controller (SSC) on FPGA. SSC contains an observer to estimate the system unknown states variables. Matrix multiplications involved in this estimation take most of the computation time of the controller. In order to make SSC much more competent for controlling fast dynamic systems, a new FPGA based parallel architecture is proposed. The reduction in computation time with optimal hardware resources is achieved by developing an efficient multistage matrix multiplication algorithm (MMM). The performance of FPGA-based SSC is validated by implementing it in an inverted pendulum control system. The design is mapped on xilinx virtex-5 FPGA device with a maximum frequency of 449.438MHz.