A four-state CBPWM technique for common-mode voltage reduction in two-level inverter

Abstract

Common-mode voltage (CMV) leads to a large number of failures in power electronics systems, for example, in two level voltage source inverter (2L VSI)-based circuits. This paper presents a four-state (4S) carrier-based pulse-width modulation (CBPWM) technique which yields the reduced CMV (RCMV) for a 2L VSI. The proposed algorithm is called as 4S RCMV CBPWM. The principle of 4S RCMV CBPWM technique is based on the four-state space vector modulation (4S SVM), which removes the zero vectors in the switching sequence and utilizes the active vectors so that the magnitude of CMV is limited to one-sixth of DC source voltage. In addition, the proposed technique also considers the target of minimizing average CMV values on the whole operation area of the space vector diagram. To implement the proposed algorithm, the CMV function is firstly analyzed so that the requirements for minimized average CMV values are achieved. Control voltages for 2L VSI is deduced from the reference voltages and offset function, thus the required average CMV is achieved. Carrier implementation for proposed algorithm is also analyzed. The theory study is verified by simulation and experiment models the quality of proposed method is evaluated in terms of harmonics distortion factors.