Abstract
Nonsynchronous sampling conditions are the source of leakage errors in measurements based on digital signal processing. The optimal method to avoid such errors is to generate a synchronous sampling clock, whenever the input signal shows enough period stability to allow this. Such method, however, does not yield a straightforward evaluation of the input signal frequency, which is required in several applications. This paper proposes a modified synchronous clock generator that together with a modified frequency interpolation algorithm provides an accurate measurement of the input signal frequency when the only available information about the sampling clock is a given integer multiple of the input signal fundamental frequency.
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