Abstract
Nonsynchronous sampling conditions are the source of leakage errors in measurements based on digital signal processing. The optimal method to avoid such errors is to generate a synchronous sampling clock, whenever the input signal shows enough period stability to allow this. Such method, however, does not yield a straightforward evaluation of the input signal frequency, which is required in several applications. This paper proposes a modified synchronous clock generator that together with a modified frequency interpolation algorithm provides an accurate measurement of the input signal frequency when the only available information about the sampling clock is a given integer multiple of the input signal fundamental frequency.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: IEEE Transactions on Instrumentation and Measurement
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.