A Formal Model of IEC 61499-Based Industrial Automation Architecture Supporting Time-Aware Computations

Dmitrii Drozdov,Sandeep Patil,Victor Dubinin,Valeriy Vyatkin

doi:10.1109/ojies.2021.3056400

Abstract

This paper proposes a formal model for industrial cyber-physical systems (CPS) with distributed control based on IEC 61499 standard and supporting time-aware computations for better adaptation to the ever changing environment conditions. Main features of the model include usage of timestamps, flattening, unified and independent behaviour of function block interfaces. This allows to make correct implementation of time-aware systems and significantly simplify the construction of models for verification and simulation, as well as ensure fairness of the model and determinism of the function block system execution at a resource level. The model formalism is based on a well-known abstract state machines (ASM) notion, which can be used as an intermediate formal representation to generate a variety of models for different purposes, e.g. formal verification, and executable code. This paper exemplifies this approach by the generation of models in the SMV language. The paper discusses the time-aware computation concept and its application in a few related case studies.

Highlights

Distributed automation systems is a vast class of cyberphysical systems (CPS) [1], providing many challenges for the CPS design and analysis
WORK In this paper, we presented for the first time a novel formal model of IEC 61499 which can be used as a universal formal intermediate semantic layer
Unlike the existing formal models of IEC 61499, this one can be used for many purposes, providing a semantic reference to the entire function block system

Summary

INTRODUCTION

Distributed automation systems is a vast class of cyberphysical systems (CPS) [1], providing many challenges for the CPS design and analysis. DROZDOV ET AL.: FORMAL MODEL OF IEC 61499-BASED INDUSTRIAL AUTOMATION ARCHITECTURE SUPPORTING TIME-AWARE COMPUTATIONS the discovery of possible faults. Gurevich [10], has been proven during the past three decades as an efficient approach for the formal specification and analysis of computer hardware and software It has been used in numerous modeling and verification projects, and later was introduced into development environments for practical usage in high-level system design and analysis [11]. Instead of aiming at determinism, that is very expensive in distributed systems, it aims at adaptability and robustness It is based on the same event-timestamping mechanism as PTIDES, but is intended to let the developer to handle each delay case individually minimizing its impact on functional properties of the automation system. We propose a comprehensive ASM-based formal model of the IEC 61499 function block architecture and apply it to the architecture extended with the event-timestamping mechanism of PTIDES.

TIME-AWARE COMPUTATIONS

FLATTENED FB MODEL

MODELLING EVENT SCHEDULER

MODELLING IN SMV

TIME-AWARE BACKTRACKING

CONCLUSION AND FUTURE WORK