Abstract

The physics requirements of the CMS Preshower detector [1] demand front-end electronics with large dynamic range, to cope with the range of energies of incident electrons/photons, and low noise, to allow inter-strip calibration with minimum ionising particles (mips). Data from the Preshower are only read-out upon reception of a 1 level trigger, necessitating the inclusion of a pipeline memory. The complexity of the Preshower front-end (“PACE”) [2] thus rivals that of the SCT and APV chips used respectively for the ATLAS and CMS trackers, and the testing of the chip, both in terms of design verification and volume production is a complicated task. A flexible testbench has thus been designed in order to facilitate a large range of tests of PACE, both digital and analogue. This paper describes the implementation of the testbench and its use to validate the design of the first full version of PACE, called PACE-2.

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