Abstract

Non-invasive Functional Electrical Stimulation (FES) is a technique applied for motor rehabilitation of patients with central nervous system injury. This technique requires programmable multichannel systems to configure the stimulation parameters (amplitude, frequency, and pulse width). Most FES systems are based on microcontrollers with fixed architecture; this limits the control of the parameters and the scaling to multiple channels. Although field programmable gate arrays (FPGA) have been used in FES systems as alternative to microcontrollers, most of them focus on signal acquisition, processing, or communication functions, or are for invasive stimulation. A few FES systems report using FPGAs for parameter configuration and pulse generation in non-invasive FES. However, generally they limit the value of the frequency or amplitude parameters to enable multichannel operation. This restricts free selection of parameters and implementation of modulation patterns, previously reported to delay FES-induced muscle fatigue. To overcome those limitations, this paper presents a proof-of-concept (technology readiness level three-TRL 3) regarding the technical feasibility and potential use of an FPGA-based pulse generator for non-invasive FES applications (PG-nFES). The main aims were: (1) the development of a flexible pulse generator for FES applications and (2) to perform a proof-of-concept of the system, comprising: electrical characterization of the stimulation parameters, and verification of its potential for upper limb FES applications. Biphasic stimulation pulses with high linearity (r2 > 0.9998) and repeatability (>0.81) were achieved by combining the PG-nFES with a current-controlled output stage. Average percentage error in the characterizations was under 3% for amplitude (1–48 mA) and pulse width (20–400 μs), and 0% for frequency (10–150 Hz). A six-channel version of the PG-nFES was implemented to demonstrate the scalability feature. The independence of parameters was tested with three patterns of co-modulation of two parameters. Moreover, two complete FES channels were implemented and the claimed features of the PG-nFES were verified by performing upper limb functional movements involving the hand and the arm. Finally, the system enabled implementation of a stimulation pattern with co-modulation of frequency and pulse width, applied successfully for efficient elbow during repetitions of a functional movement.

Highlights

  • In recent years, several rehabilitation strategies have been used to address the motor sequelae of brain and spinal cord injuries

  • Within the range of parameters commonly used for non-invasive upper limb Functional Electrical Stimulation (FES) applications, the maximum absolute percentage errors were 3.6, 0, and 1.21%, for the amplitude, frequency, and pulse width, respectively

  • The functionality of a pulse generator based on an field programmable gate arrays (FPGAs) architecture and its feasibility for non-invasive upper limb FES applications (PG-nFES), were verified through technical characterizations and a proof-of-concept for upper limb FES, when combined with a previously designed output stage (Gutiérrez et al, 2018), that provides biphasic, currentcontrolled electrical stimulation pulses

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Summary

Introduction

Most FES systems reported in the research literature (Chung et al, 2004; Popovic et al, 2005; Jovicicet al., 2012; Luzio de Melo et al, 2015; Venugopalan et al, 2015) are based on microcontrollers These devices manage the configuration and timing of the stimulation parameters: amplitude, frequency and pulse-width (Stewart et al, 2016). Microcontrollers have a fixed and low number of timers and of pulse-width modulation blocks, and they execute one instruction at a time Those features limit the design of FES systems (Stewart et al, 2016) regarding the number of stimulation channels and their flexibility for independent control of stimulation parameters, two important features in FES applications (Kesar et al, 2008; Grimm and Gharabaghi, 2016). FPGAs have enabled the design of customized digital electronic systems for several applications, such as digital control, communication interfaces, signals and image processing, computer algorithms, machine learning, and big data (Ruiz-Rosero et al, 2019)

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