Abstract
In this paper, a discrete non-stationary multiple-input multiple-output (MIMO) channel model suitable for the fixed-point realization on the field-programmable gate array (FPGA) hardware platform is proposed. On this basis, we develop a flexible hardware architecture with configurable channel parameters and implement it on a non-stationary MIMO channel emulator in a single FPGA chip. In addition, an improved non-stationary channel emulation method is employed to guarantee accurate channel fading and phase, and the schemes of other key modules are also illustrated and implemented in a single FPGA chip. Hardware tests demonstrate that the output statistical properties of proposed channel emulator, i.e., the probability density function (PDF), cross-correlation function (CCF), Doppler power spectrum density (DPSD), and the power delay profile (PDP) agree well with the corresponding theoretical ones.
Highlights
Multiple-input multiple-output (MIMO) technologies have played an important role in the fifth generation (5G) and previous communication systems [1,2,3], as they can boost channel capacity and improve spectral efficiency without increasing transmitting power or system bandwidth [4,5].It is inevitable to evaluate and validate the performance of multiple-input multiple-output (MIMO) communication devices during the development
Based on the improved geometry-based stochastic model (GBSM) with the accurate channel fading phase and Doppler frequency in [27], this paper proposes a discrete non-stationary MIMO channel model, which is suitable to implement on the field-programmable gate array (FPGA)-based hardware platforms
In order to verify the output channel of proposed emulator, we consider that both of the base station (BS) and mobile station (MS) are equipped with normalized omnidirectional antennas, the carrier frequency is f c = 2.4 GHz, and the scatterers are randomly distributed around the BS and MS
Summary
Multiple-input multiple-output (MIMO) technologies have played an important role in the fifth generation (5G) and previous communication systems [1,2,3], as they can boost channel capacity and improve spectral efficiency without increasing transmitting power or system bandwidth [4,5]. The authors in [20,21] proposed an improved sum-of-sinusoid (SoS) method to generate channel fading, and implemented it into a 2 × 2 non-stationary MIMO channel emulator. Doppler power spectrum density (DPSD) not fitting well with the theoretical ones [28] To overcome this shortcoming, an improved 3D non-stationary geometry-based stochastic model (GBSM) was proposed in [27] and implemented in a 2 × 2 MIMO channel emulator. Based on the improved GBSM with the accurate channel fading phase and Doppler frequency in [27], this paper proposes a discrete non-stationary MIMO channel model, which is suitable to implement on the FPGA-based hardware platforms.
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