A Flexible and Reliable RRAM-Based In-Memory Computing Architecture for Data-Intensive Applications

Abstract

This paper proposes a practical, flexible, and reliable in-memory computing architecture for resistive-memory-based logic designs. Our design uses a new RRAM-based polymorphic in-memory logic gate implementing all 2-input Boolean logic functions to handle real-time applications like search engines. This design reduces the proposed architecture's power-delay product (PDP) compared to competing designs by utilizing the features of the RRAM device and the proposed reconfigurable sensing amplifier. Additionally, the simulation results on the ISCAS-89 and ITC-99 benchmarks at the 7nm technology node show that the suggested architecture's PDP is lower than the comparable state-of-the-art designs. A novel sense amplifier supporting all Boolean logic functions is also proposed to handle the applications with resistive-resistive-based inputs, such as search applications. After retrieving data from the main memory, the suggested sense amplifier computes the desired output. To assess the functionality of the suggested design in the presence of process variations, Monte Carlo simulations are conducted to authenticate the robustness and high-performance operation of the proposed design in different classes of resistive-memory-based logic in the presence of process variations. Our results further demonstrate that, compared to its counterpart, the suggested strategy dramatically reduces the energy consumption of the median, Max, and Min filters in real-world applications.