Abstract

Despite the recent advances in 3C-SiC technology, there is a lack of statistical analysis on the reliability of SiO2 layers on 3C-SiC, which is crucial in power MOS device developments. This article presents a comprehensive study of the medium- and long-term time-dependent dielectric breakdowns (TDDBs) of 65-nm-thick SiO2 layers thermally grown on a state-of-the-art 3C-SiC/Si wafer. Fowler–Nordheim (F-N) tunneling is observed above 7 MV/cm and an effective barrier height of 3.7 eV is obtained, which is the highest known for native SiO2 layers grown on the semiconductor substrate. The observed dependence of the oxide reliability on the gate active area suggests that the oxide quality has not reached the intrinsic level. Three failure mechanisms were identified and confirmed by both medium- and long-term results. Although two of them are likely due to extrinsic defects from material quality and fabrication steps, the one dominating the high field (>8.5 MV/cm) should be attributed to the electron impact ionization within SiO2. At room temperature, the field acceleration factor is found to be $\approx 0.906$ dec/(MV/cm) for high fields, and the projected lifetime exceeds 10 years at 4.5 MV/cm.

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