Abstract

Maximizing the bandwidth of operation relative to dc power dissipation in complementary metal oxide semiconductor (CMOS) transconductors has been addressed in this article. It is proposed that the ac transconductance-to-dc power dissipation ratio is an appropriate objective function in this case. The general nature of the objective function is examined first. CMOS transconductors with two and four MOS working transistors are analyzed next. For structures of each kind, the ac transconductance-to-dc power dissipation ratio is maximized, and the optimal set of voltage variables is evaluated. For four-MOS structures with differential input signals, it is revealed that the choice of signal phase influences the objective function. The results of theoretical analyses are exhaustively tabulated. Numerical simulations are used to bring out the significance of the analytical expressions. This facilitates a comparison among several transconductors regarding the best possible ac transconductance-to-dc power dissipation ratio. These results are combined with HSPICE simulation results to suggest a few transconductor structures that are optimum with reference to the operation over wide bandwidths with lower power dissipation, high linearity and low harmonic distortion.

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