Abstract
A digital algorithm for real-time feature extraction, i.e. determination of pulse amplitude and timing, has been developed for the forward-spectrometer electromagnetic calorimeter in the PANDA experiment. The algorithm, which is based on the well known optimal-filter algorithm, has been designed to allow reconstruction of pile-up signals in real time and to work in a free-running DAQ system such as PANDA. To benchmark the algorithm, a Geant4-based Monte Carlo model of photon interactions in the calorimeter has been developed to generate realistic detector signals which were used as inputs to a VHDL simulation of the algorithm. The results of this simulation study show that the developed algorithm improves the time resolution by almost 50% compared to a conventional linear constant fraction discriminator algorithm. For the PANDA calorimeter, this results in a time resolution close to 100 ps/GeV per detector element at high energies. The algorithm allows reconstruction of the amplitude and timing of pile-up pulses separated by as little as 30 ns with good efficiency, fulfilling the PANDA requirements.
Highlights
The PANDA (Antiproton Annihilation at Darmstadt) experiment [1] is one of the four experimental pillars of the Facility for Antiproton and Ion Research (FAIR), which is currently being constructed in Darmstadt, Germany
To estimate T0a, we propose the use of a simplified constant fraction discriminator (CFD) algorithm: the binary-search CFD (BCFD)
We have presented a real-time feature-extraction algorithm that is based on a combination of the well-known CFD and optimal filter (OF) algorithms
Summary
The PANDA (Antiproton Annihilation at Darmstadt) experiment [1] is one of the four experimental pillars of the Facility for Antiproton and Ion Research (FAIR), which is currently being constructed in Darmstadt, Germany. In order to perform feature extraction successfully in the high count-rate environment in PANDA (rates of up to 1 MHz per detector element in the very forward part of the EMC are foreseen [3]), FPGA-based algorithms have to be developed and optimised. Such algorithms should provide good energy and time resolution of the EMC system, and enable recovery and reconstruction of pile-up events. The structure of this paper is as follows: Section 2 describes the FS EMC and the simulation model of it that has been developed and validated, Section 3 describes the components of the developed feature-extraction algorithm and its performance on single detector pulses, Section 4 describes the algorithm performance under pile-up conditions and Section 5 provides conclusions and outlook for further studies based on the obtained results
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