A Fault Tolerant Memory For Duplex Systems

Abstract

A fault-tolerant memory design uses modular bit swapping to achieve high system availability with minimum redundancy despite high memory-device failure rates. The design permits automatic repair of multiple faults without loss of error detection, thereby allowing deferral of manual repair. Although the design was directed toward use in a duplex system, the technique potentially applies to simplex systems. Double-bit swapping and 4096-word modules were chosen for this system. With a 64k memory, 18 memory device faults would occur in its 40-year life. The number of instances of manual repair will average 3; the number of faults in the system when manual repair is required will average 6. Similarly, with a 1024k memory, 288 memory faults would occur in its 40-year life. The number of instances of manual repair will average 20 and the number of faults in the system when manual repair is required will average 14.