Abstract

The SRAM-based FPGAs are widely used in space imaging system because of their reprogramming advantages. However, designers must be concerned with the effect of single event upset(SEU) on FPGA configuration memory in the space application. To evaluate the performance of SRAM-based FPGA against SEU, simulating SEU fault injection test is a common method. This paper mainly studies the method of fault injection test and the structure of test platform. The data of CCD driving timing is flipped bit by bit on the test platform. And finally count the fault rate is 1.25%, then taking about 240ms to repair the fault.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call