A Fault Detection Approach for MPSoC

Abstract

This paper proposes a hardware fault detection approach by using redundancy core for Multiprocessor system-on-chip (MPSoC). The proposed approach insert some error detection code in high level code and remove the calculation of detection code to the redundancy core of MPSoC. The author compares the proposed approach with several soft-based fault detection methods on fault detection capabilities, area, memory and performance overheads in an experiment platform. The result of comparative evaluation shows that the proposed approach is effective for MPSoC, taking some advantages in flexibility and lower cost.