Abstract
In this paper, based on research and analysis, some improvements are made compared to the traditional LDO structure, a fast load transient response performance of capacitorless LDO is designed based on SMIC180nmCMOS process. Theoretical analysis, design procedure and simulation process are also introduced. And the design process of key technologies and implementation methods are discussed in detail. The simulation results show that when the input voltage is 1.5V, the output voltage is 1.2V, the maximum load current is 300mA, and the load current is 1mA and 300mA. The maximum overshoot voltage is 51.1mV and the response time is only 1.58μs when the jump time is 1μs. The designed LDO has fast transient response performance under load and good comprehensive performance.
Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
