Abstract

In this paper, a low drop-out (LDO) linear regulator with high power supply rejection ratio(PSR) and fast transient response is proposed for various applications. To achieve fast transient response, this work employs variable bias and transient-boost capacitance. The variable bias structure enhance the slew rate and PSR of LDO. The transient-boost capacitance (TBC) is set in a proper location, using its voltage characteristic to enhance transient response without consuming quiescent current, and it also improves circuit's stability. This circuit is designed based on TSMC 65nm CMOS Technology and verified by Cadence simulation environment. According to the simulation results, the LDO achieves a PSR of 68.3dB and 51.4dB at 10kHz and 1MHz. Undershoot and overshoot of Vout are 190mV and 143mV under a varying load current from 20mA to 80mA with edge time of 1ns.

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