A Fast-Timing Simulator for Digital MOS Circuits

Abstract

An efficient and accurate algorithm has been developed for predicting the timing waveforms of general MOS transistor circuits. The algorithm uses a switch-level simulation technique to determine the steady-state conditions, a forward prediction method to predict the transient time between two adjacent voltage levels, a simplified timing simulation technique to correct this delay, and novel approaches for controlling the voltage step automatically. The simulation is further speeded up by the use of a table lookup model to calculate the transistor current and macromodels to evaluate certain circuit structures. This algorithm has been implemented as a new simulation mode, called fast timing, in the MOTIS3 multilevel mixed-mode simulator. Many production chips have been verified, and the results show that the fast-timing simulation can be three orders of magnitude faster than a conventional circuit analysis program such as SPICE, one order of magnitude faster than the MOTIS3 timing simulation, and only five times slower than the MOTIS3 unit-delay, switch-level evaluator. The delay accuracy of the new simulator is within 5 percent of the timing simulation.