Abstract
The paper presents the concept and practical implementation of a switched reluctance motor control system in an FPGA programmable device. The developed control system was designed for testing high-speed motors in order to limit the delays of output signals in relation to the signals from the encoder. The controller enables the values of commutation angles and PWM voltage to be set along with current limit values, measures the values of voltages and currents, and sends the results to the computer to be archived.
Highlights
Drives with switched reluctance motors (SRM) are characterised by a constant torque value over a wide speed range
Due to the rotor’s high speed, the control system can cause delays resulting from the time required for calculations [2]
The developed control system was designed mainly for testing a two-phase SRM drive, which had been optimised in terms of electromagnetic torque characteristics
Summary
Drives with switched reluctance motors (SRM) are characterised by a constant torque value over a wide speed range. Achieving a high level of efficiency over the entire speed range requires the adjustment of commutation conditions to the machine’s operating point [1]. Optimal relationships between rotational speed and commutation angles can be calculated using a mathematical model of the drive. The practical implementation of these relationships for highspeed drives is difficult, requiring the precise setting of output signals vs rotor position angle. Due to the rotor’s high speed, the control system can cause delays resulting from the time required for calculations [2]. When receiving high-frequency signals from the encoder, it may be necessary to limit their resolution. It is necessary to limit signal processing time; this is possible using hardware rather than software solutions
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