A fast method for process reliability analysis of CNFET-based digital integrated circuits

Abstract

Due to aggressive technology scaling in electronic of digital integrated circuits, the circuit reliability is becoming an ever-increasing challenge. In nanoscale technologies, the physical and chemical properties of materials are fundamentally different compared to the larger scales. Therefore, it is necessary to revise the conventional reliability assessment techniques considering their applicability to nanoscale integrated circuits. This paper presents a method for evaluating the circuit reliability at the transistor level of abstraction considering the physical characteristics of the transistors. The proposed method considers various parameters, including the probability of different types of a transistor failure, the topology of logic gates and the logical values of the applied input vectors. Experimental results show that the proposed approach provides accurate transistor-level circuit reliability evaluations (with < 4% inaccuracy) as compared to a reference method based on Monte Carlo HSPICE simulations in addition to more than 800 times speedup. Moreover, to show the comprehensiveness and extensibility of the proposed reliability analysis method for the technologies beyond conventional MOSFETs, it is applied to carbon nanotube field-effect transistor (CNFET) technology as one of the most promising candidates for future CMOS circuits. The obtained results re-acknowledge that in order to achieve a more accurate reliability estimation approach for CNFET circuits, it is necessary to consider the open and short failure probability values individually instead of considering them in the form of a single transistor failure probability.